Maxim MAX5865 Bedienungsanleitung Seite 9
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MAX5865
Ultra-Low-Power, High-Dynamic-
Performance, 40Msps Analog Front End
_______________________________________________________________________________________ 9
-80
-75
-70
-55
-60
-65
-50
22 24 28 3226 30 34 36 38 40
ADC TOTAL HARMONIC DISTORTION
vs. SAMPLING RATE
MAX5865 toc16
SAMPLING RATE (MHz)
THD (dB)
f
IN
= 10.0732MHz
50
55
60
75
70
65
80
22 24 28 3226 30 34 36 38 40
ADC SPURIOUS-FREE DYNAMIC RANGE
vs. SAMPLING RATE
MAX5865 toc17
SAMPLING RATE (MHz)
SFDR (dBc)
f
IN
= 10.0732MHz
ADC SIGNAL-TO-NOISE RATIO
vs. CLOCK DUTY CYCLE
MAX5865 toc18
CLOCK DUTY CYCLE (%)
SNR (dB)
65
55
60
45 504035
46
47
48
49
50
45
30
70
IA
f
IN
= 10.0732MHz
QA
ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. CLOCK DUTY CYCLE
MAX5865 toc19
CLOCK DUTY CYCLE (%)
SINAD (dB)
65
55
6050
45
40
35
46
47
48
49
50
45
30 70
f
IN
= 10.0732MHz
QA
IA
-80
-78
-74
-62
-66
-70
-76
-64
-68
-72
-60
30
40
50 60 70
ADC TOTAL HARMONIC DISTORTION
vs. CLOCK DUTY CYCLE
MAX5865 toc20
CLOCK DUTY CYCLE (%)
THD (dB)
f
IN
= 10.0732MHz
50
55
65
75
60
70
80
30 40 50
60
70
ADC SPURIOUS-FREE DYNAMIC RANGE
vs. CLOCK DUTY CYCLE
MAX5865 toc21
CLOCK DUTY CYCLE (%)
SFDR (dBc)
f
IN
= 10.0732MHz
Typical Operating Characteristics (continued)
(V
DD
= DV
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈ 10pF on all digital outputs, f
CLK
= 40MHz 50% duty cycle, ADC
input amplitude = -0.5dBFS, DAC output amplitude = 0dBFS, differential ADC input, differential DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33µF, Xcvr mode, T
A
= +25°C, unless otherwise noted.)
30
35
40
45
75
70
65
55
50
60
80
-24 -20 -16 -12 -8 -4 0
ADC SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT POWER
MAX5865 toc13
ANALOG INPUT POWER (dBFS)
SFDR (dBc)
f
IN
= 10.0732MHz
44
45
46
49
48
47
50
22 24 28 3226 30 34 36 38 40
ADC SIGNAL-TO-NOISE RATIO
vs. SAMPLING RATE
MAX5865 toc14
SAMPLING RATE (MHz)
SNR (dB)
f
IN
= 10.0732MHz
QA
IA
45
46
47
49
48
50
22 24 28 3226 30 34 36 38 40
ADC SIGNAL-TO-NOISE AND DISTORTION RATIO
vs. SAMPLING RATE
MAX5865 toc15
SAMPLING RATE (MHz)
SINAD (dB)
f
IN
= 10.0732MHz
QA
IA
- General Description 1
- Applications 1
- Features 1
- Functional Diagram 1
- Ordering Information 1
- ABSOLUTE MAXIMUM RATINGS 2
- ELECTRICAL CHARACTERISTICS 2
- Residual DC offset error 3
- -130.9 dBc/Hz 4
- ADC CHANNEL-IA FFT PLOT 7
- ADC CHANNEL-QA FFT PLOT 7
- MAX5865 toc04 8
- Pin Description 12
- Detailed Description 13
- Dual 8-Bit ADC 14
- Table 1, Figure 2). The 14
- Dual 10-Bit DAC 15
- 3-Wire Serial Interface and 16
- Operation Modes 16
- System Clock Input (CLK) 18
- Applications Information 19
- Using Op-Amp Coupling 20
- FDD and TDD Modes 20
- DIGITAL BASEBAND 21
- PROCESSOR 21
- Grounding, Bypassing, and 22
- Board Layout 22
- Dynamic Parameter Definitions 22
- Chip Information 24
- Pin Configuration 24
- Package Information 25
- PROPRIETARY INFORMATION 26
- DOCUMENT CONTROL NO.APPROVAL 26
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