Maxim MAX5865 Bedienungsanleitung PDF herunterladen (Seite 19)

Clock jitter is especially critical for undersampling

applications. Consider the clock input as an analog

input and route away from any analog input or other

digital signal lines. The MAX5865 clock input operates

with an OV

/2 voltage threshold and accepts a 50%

±15% duty cycle.

Reference Configurations

The MAX5865 features an internal precision 1.024V

bandgap reference that is stable over the entire power

supply and temperature range. The REFIN input pro-

vides two modes of reference operation. The voltage at

REFIN (V

REFIN

) sets reference operation mode (Table 4).

In internal reference mode, connect REFIN to V

REF

is an internally generated 0.512V. COM, REFP,

and REFN are low-impedance outputs with V

COM

/2, V

REFP

= V

/2 + V

REF

/2, and V

REFN

= V

/2 -

REF

/2. Bypass REFP, REFN, and COM each with a

0.33µF capacitor. Bypass REFIN to GND with a 0.1µF

capacitor.

In buffered external reference mode, apply 1.024V

±10% at REFIN. In this mode, COM, REFP, and REFN

are low-impedance outputs with V

COM

= V

/2, V

REFP

= V

/2 + V

REFIN

/4, and V

REFN

= V

/2 - V

REFIN

/4.

Bypass REFP, REFN, and COM each with a 0.33µF

capacitor. Bypass REFIN to GND with a 0.1µF capaci-

tor. In this mode, the DAC’s full-scale output voltage

and common-mode voltage are proportional to the

external reference. For example, if the V

REFIN

increased by 10% (max), the DACs’ full-scale output

voltage is also increased by 10% or to ±440mV, and

the common-mode voltage increases by 10%.

Applications Information

Using Balun Transformer AC-Coupling

An RF transformer (Figure 7) provides an excellent

solution to convert a single-ended signal source to a

fully differential signal for optimum ADC performance.

Connecting the center tap of the transformer to COM

provides a V

/2 DC level shift to the input. A 1:1 trans-

former can be used, or a step-up transformer can be

selected to reduce the drive requirements. In general,

the MAX5865 provides better SFDR and THD with fully

differential input signals than single-ended signals,

especially for high-input frequencies. In differential

mode, even-order harmonics are lower as both inputs

(IA+, IA-, QA+, QA-) are balanced, and each of the

ADC inputs only requires half the signal swing com-

pared to single-ended mode. Figure 8 shows an RF

transformer converting the MAX5865 DACs’ differential

analog outputs to single ended.

MAX5865

Ultra-Low-Power, High-Dynamic-

Performance, 40Msps Analog Front End

______________________________________________________________________________________ 19

Table 4. Reference Modes

REFIN

REFERENCE MODE

>0. 8 x V

Internal reference mode. V

REF

is internally

generated to be 0.512V. Bypass REFP,

REFN, and COM each with a 0.33µF

capacitor.

1.024V ±10%

Buffered external reference mode. An

external 1.024V ±10% reference voltage

is applied to REFIN. V

REF

is internally

generated to be V

REFIN

/2. Bypass REFP,

REFN, and COM each with a 0.33µF

capacitor. Bypass REFIN to GND with a

0.1µF capacitor.

Figure 7. Balun-Transformer Coupled Single-Ended to

Differential Input Drive for ADCs

COM

IA+

IA-

25Ω

0.1µF

0.33µF

25Ω

0.1µF

MAX5865

22pF

QA+

QA-

25Ω

0.1µF

0.33µF

25Ω

0.1µF

22pF

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