Maxim DS33Z41 Spezifikationen PDF herunterladen (Seite 2)

Section 3. Framer/Single-Chip Transceiver Questions

How are the DS21x5y, DS215y, or other telecommunication devices initialized?

Do Maxim telecommunication devices support unframed or transparent-mode operation?

Is it necessary to repeat the same data on the TSIG pin for an entire multiframe when using hardware-based

signaling?

How are JTAG functions implemented on SCT multichip modules such as the DS21Q352/DS21Q55?

Is the DS2155 pin compatible with other Maxim SCTs?

Do Maxim T1 devices support SLC-96?

What are some common problems and solutions when using the DS2155 internal HDLCs?

Why does the external loopback on the DS26401/DS2155 not work properly, even though the remote and

payload loopbacks work fine?

What are the differences between the DS21455/DS21458 and the older DS21Q55?

10.

What is the functional behavior of the RCLK pin output when the signal at the network connection of RTIP/RRING

is lost?

11.

When operating T1/E1 devices in T1 mode, can the TCLK pin input frequency be 2.048MHz?

Section 4. Line Interface Questions

What transformers are recommended for the Maxim telecommunication devices?

What is the function of the capacitor in the transmit path?

When using the DS2148 LIU in NRZ mode, how should the signals for the TPOS and TNEG pins be connected?

What are the selection criteria for the line build-out (LBO) bits in E1 applications?

When the cable is unplugged for the network interface, why does the receive carrier loss (RCL) bit in the status

What are the differences between the DS21448 and the older DS21Q48/DS21Q348?

Why is the master clock (MCLK) signal necessary for proper device operation?

Is the center-tap connection of the transformer secondary side necessary for better analog performance of the

DS3151, DS3152, DS3153, and DS3154 devices?

Is it possible to use a sine-wave oscillator instead of a square-wave oscillator to supply different frequencies at

the CLAD for the DS325x?

10.

Does the DS26334 LIU support internal impedance-matched operation? If so, what are the steps to program the

device in this mode?

Section 5. BERT Questions

When using the DS2155, DS2172, or DS2174 bit-error-rate tester (BERT) function with a pseudorandom bit

stream (PRBS) pattern, what status bits must be checked to validate that the pattern is being correctly received?

Why do the DS2172/DS2174 BERT devices remain in synchronization when the clock signal applied to the receive

clock (RCLK) pin is removed or held in a steady state?

How is the latch-count (LC) bit used to set the time interval for the bit and error counters of the DS21372,

DS2172, and DS2174?

Why do the DS21372/DS2172 receive synchronizers sometimes lock to patterns other than the transmitted

pattern in repetitive-pattern mode?

Why does the DS2174 design kit (DS2174DK) have neither a crystal nor an oscillator?

Section 6. HDLC Questions

What are the differences between bridge and configuration modes in the HDLC controller?

Does the DS31256 HDLC controller support 8-bit local bus mode?

How is the absolute address calculated in DS31256 HDLC controller?

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