Maxim DS33Z41 Spezifikationen PDF herunterladen (Seite 11)

The DS21455 is a monolithic version of the DS21Q55, and is meant to be a drop-in replacement that is package, pin, and

software compatible. The DS21458 contains exactly the same die as the DS21455 and is software compatible, but it is

produced in a smaller, 17mm x 17mm package. Note: New designs should use the DS21455 instead of the DS21Q55.

Q10. What is the functional behavior of the RCLK pin output when the signal at the network

connection of RTIP/RRING is lost?

A10. When the device loses the signal at the network connection of RTIP/RRING, it enters the carrier-loss state. In this

state, the RCLK output will slowly drift from the recovered clock, which is no longer present, to the master clock (MCLK)

input. Once the network connection is restored, the RCLK output will again lock with the signal present on RTIP/RRING.

Q11. When operating T1/E1 devices in T1 mode, can the TCLK pin input frequency be 2.048MHz?

A11. T1/E1 devices (such as the DS2155, DS21458, and DS26528) provide a wide range of features aimed at easing

device configuration. One of these features is the ability to use a single-frequency master clock (MCLK) in either T1 or E1

mode. Unfortunately, the device still requires that the external TCLK pin input be at the actual line frequency. In T1

mode, this means the input frequency on the TCLK pin must be 1.544MHz. However, there are some ways around this

limitation, using either the elastic stores for rate conversion, or using the master clock PLL to source TCLK internally at

1.544MHz.

4. Line Interface Questions

Q1. What transformers are recommended for the Maxim telecommunication devices?

A1. A listing of recommended transformers is provided in application note 351, "T1/E1 and T3/E3 Transformer Selection

Guide," and in the last section of the application note 324, "T1/E1 Network Interface Design."

Q2. What is the function of the capacitor in the transmit path?

A2. The reason that the capacitor exists is to block the flow of current between the TTIP and TRING pins, preventing

unnecessary power draw. The capacitor value stated in the data sheet was chosen so that it appears as a short circuit at

the transmission frequency and an open circuit at DC. Although the value is somewhat subjective, this value has been

proven to work with all Maxim telecommunication devices and should not be altered. If the value must be changed,

another value can be calculated by the formula f = 1/RC. R is the load as seen by the device (1/4 of the line impedance),

C is the capacitor value, and f is the mean signal frequency. Remember that an all ones signal appears as 772kHz, and a

lower ones density decreases the signal frequency. The capacitor must be chosen such that the signal frequency is not

blocked.

Q3. When using the DS2148 LIU in NRZ mode, how should the signals for the TPOS and TNEG

pins be connected?

A3. Connect the NRZ input to TPOS and tie TNEG to ground.

Q4. What are the selection criteria for the line build-out (LBO) bits in E1 applications?

A4. The criteria depend not only on the intended application for the SCT, but also to what type of system the design is

interfacing. The line interface circuit can be designed many ways and the following applications explain the difference in

the three major operations obtained by switching the LBO.

75Ω/120Ω Normal This is used for E1 short haul, when the system will be used in a confined environment where the

return loss is insignificant and there will be no exposure to lighting surges or power-line cross conditions.

75Ω/120Ω with Protection Resistors or 75Ω/120Ω with High Return Loss These two operations are used for E1

long haul, when the system will interact with the outside environment. Here, the return loss is also considered to be

insignificant. In order protect the system from lighting surges and power-line cross conditions, power resistors are placed

in between the RJ48 connector and the network side of the transformer.

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Maxim DS33Z41 Spezifikationen Seite 11