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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock
9 of 45
Table 1. Special Function Register Locations
* Functions not present in the 80C52 are in bold.
REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ADDRESS
P0 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 80h
SP 81h
DPL 82h
DPH 83h
DPL1
84h
DPH1
85h
DPS 0 0 0 0 0 0 0 SEL
86h
PCON
SMOD_0
SMOD0
— — GF1 GF0 STOP IDLE 87h
TCON TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 88h
TMOD GATE
C/
T
M1 M0 GATE
C/ T
M1 M0 89h
TL0 8Ah
TL1 8Bh
TH0 8Ch
TH1 8Dh
CKCON WD1 WD0 T2M T1M T0M MD2 MD1 MD0
8Eh
P1 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 90h
EXIF IE5 IE4 IE3 IE2 XT/RG RGMD RGSL BGS
91h
TRIM E4K
X12/
6
TRM2
TRM2
TRM1
TRM1
TRM0
TRM0
96h
SCON0
SM0/FE_0
SM1_0 SM2_0 REN_0 TB8_0 RB8_0 TI_0 RI_0 98h
SBUF0 99h
P2 P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 A0h
IE EA ES1 ET2 ES0 ET1 EX1 ET0 EX0 A8h
SADDR0 A9h
SADDR1 AAh
P3 P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 B0h
IP — PS1 PT2 PS0 PT1 PX1 PT0 PX0 B8h
SADEN0 B9h
SADEN1 BAh
SCON1
SM0/FE_1
SM1_1 SM2_1 REN_1 TB8_1 RB8_1 TI_1 RI_1
C0h
SBUF1
C1h
ROMSIZE
— — — — —
RMS2 RMS1 RMS0
C2h
PMR CD1 CD0 SWB — XTOFF
ALEOFF
DME1 DME0
C4h
STATUS PIP HIP LIP XTUP SPTA1 SPRA1 SPTA0 SPRA0
C5h
TA C7h
T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2
C/
T2
CP/ RL2
C8h
T2MOD
— — — — — —
T2OE DCEN C9h
RCAP2L CAh
RCAP2H CBh
- DS87C530/DS83C530 1
- ORDERING INFORMATION 2
- DETAILED DESCRIPTION 3
- PIN DESCRIPTION 4
- PIN DESCRIPTION (continued) 5
- COMPATIBILITY 7
- PERFORMANCE OVERVIEW 7
- INSTRUCTION SET SUMMARY 7
- SPECIAL FUNCTION REGISTERS 8
- SM0/FE_0 9
- SM0/FE_1 9
- CP/ RL2 9
- NONVOLATILE FUNCTIONS 10
- REAL-TIME CLOCK 10
- NONVOLATILE RAM 11
- CRYSTAL AND BACKUP SOURCES 11
- Timekeeping Crystal 11
- Backup Energy Source 12
- IMPORTANT APPLICATION NOTE 12
- MEMORY RESOURCES 12
- OPERATIONAL CONSIDERATION 13
- PROGRAM MEMORY ACCESS 13
- DATA MEMORY ACCESS 14
- STRETCH MEMORY CYCLE 15
- DUAL DATA POINTER 16
- POWER MANAGEMENT 17
- POWER MANAGEMENT MODE (PMM) 17
- CRYSTAL-LESS PMM 18
- PMM OPERATION 18
- Clock Divider 18
- Switchback 19
- Crystal/Ring Operation 20
- IDLE MODE 23
- STOP MODE ENHANCEMENTS 23
- EMI REDUCTION 24
- PERIPHERAL OVERVIEW 25
- SERIAL PORTS 25
- TIMER RATE CONTROL 25
- POWER-FAIL RESET 25
- POWER-FAIL INTERRUPT 25
- WATCHDOG TIMER 26
- INTERRUPTS 27
- EPROM PROGRAMMING 28
- PROGRAMMING PROCEDURE 28
- DS87C530 SECURITY OPTIONS 29
- Lock Bits 29
- Encryption Array 29
- Other EPROM Options 29
- DS87C530 Signature 29
- 30 of 45 30
- SECURITY OPTIONS 31
- DS83C530 ROM Verification 32
- DS83C530 Signature 32
- ABSOLUTE MAXIMUM RATINGS 33
- RD Low to Address Float 36
- EXPLANATION OF AC SYMBOLS 38
- DATA MEMORY WRITE CYCLE 40
- EXTERNAL CLOCK DRIVE 41
- SERIAL PORT MODE 0 TIMING 42
- POWER-CYCLE TIMING 43
- PACKAGE INFORMATION 44
- DATA SHEET REVISION SUMMARY 45
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