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DS33M33DK
Rev: 102108 11 of 48
12. Address Map
Address space begins at 0x81000000. All offsets given in the following tables are relative to 0x81000000.
Registers in the FPGA can be easily modified using the ChipView host-based user interface software along with
the definition file named Overhead_FPGA.def.
Table 12-1. Address Map
OFFSET DEVICE DESCRIPTION
0X6000 FPGA Overhead CPLD and Clock/Signal Routing
0X4000 DS3154 DS3154 Line Interface Unit
0X0000 DS33M33 DS33M33 Registers
12.1 Overhead CPLD Register Map
Table 12-2. Register Map for Overhead CPLD (Reference Designator U01)
OFFSET
REGISTER
NAME
TYPE DESCRIPTION
0X0001 ATOH_CFG Control ATOH Configuration
0X0002 ATOHEN_CFG Control ATOHEN Configuration
0X0003 GPIOAwr Control GPIO A Output Enable + Write Value
0X0004 GPIOBwr Control GPIO B Output Enable + Write Value
0X0005 DTOH_STAT Read-Only DTOH Status
0X0006 DTOH_SEL Control DTOH Configuration
0X0007 GPIOrd_STAT Read-Only GPIO Read Values
0X0008 RDOH_STAT Read-Oonly RDOH Status
0x000A RDOH_SEL Control RDOH Select
0x000D TAOH_CFG Control TAOH Configuration
0x000F TAOHen_CFG Control TAOHen Configuration
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